3G, 4G and Long Term Evolution (LTE) Ciphers
SafeXcel™ IP-46 SNOW 3G Crypto Core Family
The SafeXcel-IP-46 SNOW 3G Accelerators implement the SNOW 3G algorithm, as specified in the 3GPP SNOW 3G Specification for Confidentiality and Integrity Algorithms UEA2 & UIA2, 128-EEA1 & 128-EIA1. Designed for fast integration, low gate count, and maximum performance, the SafeXcel IP SNOW 3G Accelerator Family provide a reliable and cost-effective SNOW 3G IP solution that is easy to integrate into SoC designs. Optionally these cores can be offered integrated inside the SafeXcel-IP-94 Packet Engine family.
Benefits
• High-speed SNOW 3G solution
• Fast and easy to integrate into SoCs
• Complete range of configurations
• World-class technical support
Features
• Supported key sizes: 128 bits
• Includes feedback mode logic as defined for SNOW 3G within 3GPP:
- UEA2, UIA2
- 128-EEA1, 128-EIA1
• Fully synchronous design.
SafeXcel-IP-06 AES Kasumi Crypto Core Family
The SafeXcel-IP-06 KASUMI Accelerators implement the Specification of the 3GPP Confidentiality and Integrity Algorithms as specified in 3GPP TS 35.201 and 3GPP TS 35.202.
Designed for fast integration, low gate count, and maximum performance, the SafeXcel IP Kasumi Accelerators provide a reliable and cost-effective Kasumi IP solution that is easy to integrate into SoC designs.
Benefits
• High-speed KASUMI solution
• Silicon-proven implementation
• Fast and easy to integrate into SoCs
• Flexible layered design
• Complete range of configurations
• World-class technical support
Features
• KASUMI encryption and decryption modes,
• Includes key scheduling hardware,
• Includes feedback mode logic, with support for:
- Basic operation
- F8 confidentiality algorithm
- F9 integrity algorithm
• Automatic data padding mechanism for F9 algorithm,
• Fully synchronous design.
SafeXcel-IP-18 Camellia Crypto Core Family
The SafeXcel-IP-18 Camellia Accelerator implements the Camellia crypto algorithm, as specified in “Specification of Camellia” and RFC3713. Designed for fast integration, low gate count, and maximum performance, the SafeXcel IP Camellia Accelerator provides a reliable and cost-effective Camellia IP solution that is easy to integrate into SoC designs.
Benefits
• High-speed Camellia solution
• Silicon-proven implementation
• Fast and easy to integrate into SoCs
• Flexible layered design
• Complete range of configurations
• World-class technical support
Features
• Supported key sizes: 128, 192, 256 bits
• Includes key scheduling hardware,
• Includes feedback mode logic, with support for:
- ECB
- CBC
- CTR
• Fully synchronous design